標準符号化試験信号 ってなに? その2
特定無線設備の技術基準適合証明等に関する規則別表第一号一(3)の規定に基づく特性試験の試験方法
総務省の資料を見て見ると
標準符号化試験信号(ITU―T勧告O.150による9段PN符号又は15段PN符号)
との表記がある。
O.150 : Digital test patterns for performance measurements on digital transmission equipment
T-REC-O.150-199210-S.PDF
資料がこちら
4.1 511-bit pseudo-random test pattern
This pattern is primarily intended for error measurements on data circuits at bit rates up to 14 400 bit/s (see The pattern may be generated in a nine-stage shift register whose 5th and 9th stage outputs are added in a The pattern begins with the first ONE Number of shift register stages 9 |
この資料によると
・原始多項式は X^9+X^5
・最初は111111111 から始まる
・最長の 0 は 8bit なので、"000000000" は含まない 0x001 - 0x1FF の 511通り
1111111110000011110111110001011100110010000010010100111011010001 1110011111001101100010101001000111000110110101011100010011000100 0100000000100001000110000100111001010101100001101111010011011100 1000101000010101101001111110110010010010110111111001001101010011 0011000000011000110010100011010010111111101000101100011101011001 0110011110001111101110100000110101101101110110000010110101111101 0101010000001010010101111001011101110000001110011101001001111010 111010100010010000110011100001011110110110011010000111011110000 |
出力はこうかな・ω・
ついでなので、15段PN符号
4.3 32767-bit pseudo-random test pattern This pattern is primarily intended for error and jitter measurements at bit rates of 1544, 2048, 6312, 8448, 32064 and 44736 kbit/s (see Recommendation O.151). The pattern may be generated in a fifteen-stage shift register whose 14th and 15th stage outputs are added in a modulo-two addition stage, and the result is fed back to the input of the first stage. Number of shift register stages 15 |
・原始多項式は X^15+X^14
・最長の 0 は 15bit で シグナルは反転
0000000000000001111111111111101111111111111001111111111110101111 1111111000011111111110111011111111100110011111111010101011111110 0000000111111011111110111110011111100111101011111010111000011110 0001101110111011101001100110011000101010101010110000000000000101 1111111111100011111111111011011111111110010011111111101001011111 1110001000111111101100110111111001010100111110100000010111100011 1110001110110111101101100100111001001010010110100100001000100010 0111001100110010110101010101000100000000000110011111111110101011 1111111000000111111110111110111111100111100111111010111010111110 0001100001111011101011101110011000011001101010111010101000000110 0000001111101011111101111000011111001110111011110101100110011100 0010101010110111000000000100110111111110010100111111101000010111 1110001110001111101101101101111001001001001110100100100101100010 0100100010110010010011000101001001010110000100100000101110010011 1100011010010111011010001000110010001100110101001101010100000101 : |
つまりこんな感じか ・ω・
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